![[Frank Poppen]](2022_FrankPoppen_NXP.jpg)
Personalien |
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| Name | Frank Poppen | ||||||
| Anschrift | 26160 Wehnen / Bad Zwischenahn
Germany eMail: Frank@Familie-Poppen.de |
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| Geburtsdaten | Leer/Ostfriesland, 09.03.1973 | ||||||
| Nationalität | Deutsch | ||||||
| Familienstand | Verheiratet, ein Kind | ||||||
Beruflicher Werdegang |
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| seit Okt.2022 | NXP Semiconductors Germany GmbH | ||||||
| Jan.2022-Sep.2022 | Deutsches Zentrum für Luft- und Raumfahrt | ||||||
| Sep.1999-Dez.2021 | Forschungsinstitut OFFIS
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| seit 2007 | Technical Chairman der Synopsys User Group Europe (SNUG) | ||||||
| seit 2001 | Mitglied im technischen Komitee der Synopsys User Group Europe (SNUG) | ||||||
Projekte |
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| 2021-2022 | BMBF Projekt Scale4Edge | ||||||
| 2017-2021 | BMBF Projekt SATiSFy | ||||||
| 2017-2018 | MULTIC-Tooling, Forschungsvereinigung Automobiltechnik, FAT | ||||||
| 2017 | BMBF Projekt Productive4.0 | ||||||
| 2016-2017 | MULTIC, Forschungsvereinigung Automobiltechnik, FAT | ||||||
| 2013-2017 | BMBF Projekt EffektiV | ||||||
| 2012-2013 | Industrieprojekt MODAS (Robert Bosch GmbH) | ||||||
| 2012-2013 | Industrieprojekt SANITAS (Robert Bosch GmbH) | ||||||
| 2010-2012 | EU Projekt Nephron+ | ||||||
| 2009-2010 | EU Projekt CESAR | ||||||
| 2006-2009 | Industrie Projekt POS-Terminal (Vitakraft-Werke Wührmann & Sohn) | ||||||
| 2005-2008 | BMBF Project PRODUKTIV+ | ||||||
| 2004-2009 | EU Project HEARCOM (Hearing in the Communication Society) | ||||||
| 2003-2010 | Industrie Projekt Forsch CV (ChipVision Design Systems AG) | ||||||
| 2001-2004 | Industrie Projekt Pick-To-Light (ELV Elektronik AG ) | ||||||
| 2001-2004 | MWK Project DesCEM | ||||||
| 2000-2002 | VIP (Versatile Integrated Payphone) | ||||||
Veröffentlichungen |
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| Zenodo 2021 | "Implementing VexRiscv Based Murax SoC on Arty A7 Artix-7 PCB from Digilent and Enabling JTAG Connection through Xilinx's BSCANE2 Debug IP" | ||||||
| DESTION 2019 | "Multi-Layer Time Coherency in the Development of ADAS/AD Systems: Design Approach and Tooling" | ||||||
| FAT 2019 | Schriftenreihe-316: "MULTIC-Tooling" | ||||||
| WCX 2018 | "Coherent Treatment of Time in the Development of ADAS/AD Systems: Design Approach and Demonstration" | ||||||
| FAT 2017 | Schriftenreihe-302: "Design Paradigms for Multi-Layer Time Coherency in ADAS and Automated Driving (MULTIC)" | ||||||
| DVCon Europe 2017 | "Using an Enhanced Verification Methodology for Back-to-Back RTL/TLM Simulation" | ||||||
| SNUG Germany 2015 | "Using Synopsys VCS to connect a Company's SystemC Verification Methodology to Standard Concepts of UVM" | ||||||
| ESE Kongress 2014 | "Holodeck für die Entwicklung eingebetteter Systeme" | ||||||
| DVCon Europe 2014 | "Connecting a Company's Verification Methodology to Standard Concepts of UVM" | ||||||
| ESLsyn 2014 | "Considering Variation and Aging in a Full Chip Design Methodology at System Level" | ||||||
| DAC 2014 | "Safety Evaluation of Automotive Electronics Using Virtual Prototypes: State of the Art and Research Challenges" | ||||||
| iX Developer 2/2014 | "Holodeck auf der Spur - Gründe für die Virtualisierung eingebetteter Systeme" | ||||||
| SW12 | "Co-Simulation of C-Based SoC Simulators and Matlab Simulink" | ||||||
| BMT 2012 | "Integrated Monitoring for Personalized Renal Replacement Therapy" | ||||||
| ASIM-Konferenz STS/GMMS2011 | "Simulink and Virtual Hardware Platform Co-Simulation for Accurate timing Analysis of Embedded Control Software" | ||||||
| CPMNS 2011 | "Virtual Prototype of a Personal Medical Device - Simulation of a Multi Nature System" | ||||||
| FDL 2011 | "Impact Simulation of Changes to Development Processes: an ESL Case Study" | ||||||
| edaWorkshop 2011 | "Impact Estimation for Design Flow Changes", (Poster) | ||||||
| ICED 2011 | "Economic Impact Estimation of New Design Methods" | ||||||
| ESAO 2011 and IFAO 2011 |
"Nephron+ Wearable Artificial Kidney" | ||||||
| 2010 | Buchtitel "Modelling and Management of Engineering Processes", Titel "Process Model Based Methodology for Impact Analysis of New Design Methods" | ||||||
| EURASIP 2009 | "The Personal Hearing System - a Software Hearing Aid for a Personal Communication System" | ||||||
| CATRENE 2009 | "European Design Automation Roadmap" (CATRENE Roadmap) | ||||||
| IEMC Europe 2008 | "Real-Time Quality Estimation to Enable Process Evaluation in Integrated Circuit Development" | ||||||
| DATE 2008 | "Qualitative and Quantitative Analysis of IC Designs" | ||||||
| edaWorkshop 2007 | "Modellierung von Komplexität und Qualität als Faktoren von Produktivität in Design-Flows für integrierte Schaltungen" | ||||||
| CDNlive 2007 | "Comparing Executable Specifications regarding Power at Algorithmic Level (ANSI-C/SystemC)" (Poster) | ||||||
| SNUG Europe 2006 | "Power Optimised Digital Filterbank as Part of a Psychoacoustic Human Hearing Model" | ||||||
| SNUG Boston 2001 | "Evaluation of a Behavioral Level Low Power Design Flow Based on a Design Case" | ||||||
| SNUG Europe 2001 | "Comparison of a RT- and Behavioral-Level Design Entry Regarding Power" | ||||||
| 2000 | "Low Power Design Guide" | ||||||
| 1998 | Diplomarbeit "Redesign eines VLSI Chips zur gehörgerechten Signalvorverarbeitung akustischer Signale" |
Bildungsweg |
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| 1999 | Abschluss Dipl.-Inform. | ||||||
| 1993-1999 | Informatikstudium an der Carl von Ossietzky Universität in Oldenburg mit Schwerpunkt "technische Informatik" ab dem Hauptstudium | ||||||
| 1992-1993 | Präsenzdienst, Sanitätssoldat | ||||||
| 1992 | Abschluss Allgemeine Hochschulreife | ||||||
| 1985-1992 | Besuch des Teletta Groß Gymnasium in Leer/Ostfriesland | ||||||
Beschäftigungen während des Studiums |
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| 1999 | Betreuung des Messestandes "Silicon Cochlea" auf der CeBit99 | ||||||
| 1998-1999 | Studentische Hilfskraft in der AG EIS
Aufgabenprofil: ASIC-Design / -Synthese und Projektgruppenbetreuung |
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| 1996-1998 | Aushilfskraft beim Deutschen Paketdienst | ||||||
| 1995 | Unterstützen des "Vereins für humanitäre Hilfe e.V" bei der Erstellung und Wartung von Microsoft Excel Tabellen und Macros | ||||||
Kenntnisse |
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| 2008 | Weiterbildung "IDESA Design for Manufactoring Flow" | ||||||
| 2007 | Weiterbildung "[APM] Agiles Projektmanagement" | ||||||
| 2003 | Weiterbildung "Design of Analog ICs in a Mixed Signal Environment" | ||||||
| 2002 | Weiterbildung "Digital Signal Processing with FPGAs" | ||||||
| 2001 | Weiterbildung "Application-Specific Multi-Processor SoC Summer School" | ||||||
| 2000 | Weiterbildung "Esperan Low Power Workshop" | ||||||
| EDA-Werkzeuge | Vollständiger FPGA und ASIC Design Flow Front to Back Synopsys (VCS, Virtualizer, BehavioralCompiler, DesignCompiler, PowerCompiler, Physical Compiler, LibraryCompiler, Eve-ZeBu HW emulation) Cadence (First Encounter, Silicon Ensemble, Affirma Analog Circuit Environment, Spectre Simulator, Virtuoso XL Layouteditor, Diva LVS/DRC/Extractor, Abstract Generator) Mentor (Questa/ModelSim) Mathworks (Matlab, Simulink) Xilinx (Vivado/ISE, Matlab System Generator) Imperas (OVP) ChipVision Orinoco |
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| Sonstige | IBM Rational DOORS | ||||||
| Technologien | C/C++, SystemC, ANTLR, VHDL, Verilog, SpinalHDL, VexRiscv, SystemVerilog, UVM, Perl, TCL, Node-RED, MQTT, MariaDB, InfluxDB, Raspberry Pi, ESP8266, Free RTOS | ||||||
| Sprachkenntnisse | Muttersprache Deusch (C2), Fließend Englisch in Wort und Schrift (C1) | ||||||
Ehrenämter |
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| seit 2021 | Schriftführer im Förderverein der Freiwilligen Feuerwehr Ofen e. V., Bad Zwischenahn | ||||||
| seit 2005 | Freiwillige Feuerwehr Ofen - Rang Hauptfeuerwehrmann, seit 2010 Atemschutzgerätewart, (Einsatz A28) | ||||||
| 2015-2021 | Betriebsrat im OFFIS Institut für Informatik, seit 2016 stellvertretender Vorsitz | ||||||
| 2008-2021 | Ersthelfer im OFFIS Institut für Informatik | ||||||
| 2000-2019 | Pressewart beim SV Stikelkamp | ||||||
| 1985-2005 | Freiwillige Feuerwehr Neukamperfehn |